Professor Jie Gu Receives $3.8 Million DARPA ScAN Program Award

The Defense Advanced Research Projects Agency (DARPA) Microsystems Technology Office awarded Northwestern Engineering’s Jie Gu and co-PIs Yiran Chen (Duke University) and Ramesh Harjani (University of Minnesota) up to $3.8 million through the Scalable Analog Neural-networks (ScAN) program, a 4.5-year, two-phase effort launched this year.

“This is an exciting project that really drives innovation in the emerging landscape of AI-powered intelligent hardware,” said Gu, associate professor of electrical and computer engineering at the McCormick School of Engineering. “This is the first strong effort to push analog computing concepts into practical usage at the exact place that analog computing shows its strong benefits — at the physical sensor interface.”

Advancing analog in-sensor computing solutions for edge AI

The team aims to advance a disruptive in-sensor computing solution for analog-based neural network accelerators for supporting edge AI operation at small sensor nodes. In-sensor computing combines sensing and computing in one device, allowing data to be analyzed in real-time right where it’s captured without requiring conventional, highly expensive data conversion and digital signal processing.

The existing digital systems that run neural network models require immense power consumption. This limits the deployment of advanced AI in size-, weight-, and power-constrained environments, such as small image sensors in object recognition, navigation, or machine vision applications. And, while analog in-memory computing is highly energy efficient, it’s challenging to scale up because it’s sensitive to manufacturing and environmental variations. Thus, analog in-memory computing has only been demonstrated at small scale.

Impact through collaboration

To achieve DARPA’s ScAN program objectives, the researchers proposed a three-prong solution that integrates novel architecture, circuitry, and algorithm design, targeting to bring two-to-three orders-of-magnitude improvements to the scalability, robustness, and energy efficiency of analog neural networks that interface directly with the analog outputs of conventional sensors.

The Northwestern team will lead the project development with an emphasis on an efficient architecture solution.

Harjani’s team at the University of Minnesota will develop the most efficient analog circuit solution with high tolerance to variation.

Meanwhile, Chen’s group at Duke University will be working on a complete package of variation-tolerant algorithm solutions that will significantly reduce the variation sensitivity of the analog circuit and the energy efficiency of the hardware design.

“Our proposed design seeks to revolutionize the edge-AI hardware solution by advancing the most efficient analog neural networks into a practical, commercial-viable technique,” Gu said.